product brief may 1998 ambassador tm T8105 h.100/h.110 interface and time-slot interchanger features n fully backwards compatible to the t8100, t8100a, and t8102 by hardware strapping and program- ming the dev_id register n complete solution for interfacing board-level circuitry to the h.100/h.110 telephony bus n includes 2 ct_netref pins n h.100/h.110 compliant interface; all mandatory signals n programmable connections to any of the 4096 time slots on the h.100/h.110 bus n up to 16 local serial inputs and 16 local serial outputs, programmable for 2.048 mbits/s, 4.096 mbits/s, and 8.192 mbits/s operation per chi specifications n programmable switching between local time slots, up to 1024 connections n programmable switching between local time slots and h.100/h.110 bus, up to 512 connections n choice of frame integrity or minimum latency switching on a per-time-slot basis: frame integrity to ensure proper switching of wideband data minimum latency switching to reduce delay in voice channels n on-chip phase-locked loop (pll) for h.100/h.110, mvip *, or dialogic s ? sc-bus clock operation in master or slave clock modes n serial tdm bus rate and format conversion between most standard buses n optional 8-bit parallel input and/or 8-bit parallel output for local tdm interfaces n high-performance microprocessor interface: provides access to device configuration regis- ters and to time-slot data supports both motorola ? nonmultiplexed and intel multiplexed/nonmultiplexed modes n subrate switching of nibbles, dibits, or bits n programmable gpio n two independently programmable groups of up to 12 framing signals each n 3.3 v local i/o with 5 v tolerant inputs and ttl- compatible outputs n boundary-scan testing support n 208-pin, plastic sqfp n 217-pin bga package applications n computer-telephony systems n enhanced service platforms n wan access devices n pbxs description the ambassador T8105 is an h.100/h.110-compli- ant device that provides a complete interface between the h.100/h.110 bus and a wide variety of telephony interface components, processors, and other circuits. the bus interface provides all signals needed for the h.100/h.110 bus, the h- mvip and mvip -90 buses, or the sc-bus. local interfaces include sixteen serial inputs and sixteen serial out- puts based on the lucent concentration highway interface (chi). two built-in time-slot interchangers are included. the first provides a local switching domain with up to 1024 programmable connections between time slots on the local chi inputs and out- puts. the second supports up to 512 programmable connections between any time slot on the h.100/ h.110 bus and any time slot in the local switching domain. the ambassador T8105 is configured via a microprocessor interface. this interface can also read and write time-slot and device data. * mvip is a trademark of natural microsystems corporation. ? dialogic is a registered trademark of dialogic corporation. ? motorola is a registered trademark of motorola, inc. intel is a registered trademark of intel corporation.
2 lucent technologies inc. product brief may 1998 h.100/h.110 interface and time-slot interchanger ambassador T8105 description (continued) onboard clock circuitry, including a digital phase-locked loop, supports all h.100/h.110 clock modes including mvip and sc-bus compatibility clocks. the local chi interfaces support pcm rates of 2.048 mbits/s, 4.096 mbits/s, and 8.192 mbits/s. the ambassador T8105 has internal circuitry to support either minimum latency or multi-time-slot frame integrity. frame integrity is a requisite feature for applications that switch wideband data (isdn h-channels). minimum latency is advantageous in voice applications. 5-6101(f)c figure 1. block diagram of the ambassador h.100, h.110, h- mvip internal clocks and state counter s/p and p/s converters 512 location data sram three 512 location connection cams 1024 location data memory output logic and p/s convert input logic and s/p convert 1024 location connection memory timing and control microprocessor interface frame group interface logic frame groups addr[1:0] data[7:0] m p controls misc. i/o clocks and refs internal data internal address and control local out local in
lucent technologies inc. 3 product brief may 1998 h.100/h.110 interface and time-slot interchanger ambassador T8105 application overview the integration of computers and telecommunications has enabled a wide range of new communications applications and has fueled an enormous growth in communications markets. a key element in the devel- opment of computer-based communications equipment has been the addition of an auxiliary telecom bus to existing computer systems. most manufacturers of high-capacity, computer-based telecommunications equipment have incorporated some such telecom bus in their systems. typically, these buses and bus inter- faces are designed to transport and switch nx64 kbits/s low-latency telecom traffic between boards within the computer, independent of the computers i/o and mem- ory buses. at least a half dozen of these pc-based telecom buses emerged in the early 1990s for use within equipment based on isa/eisa and mca com- puters. with the advent of the h.100/h.110 bus specification by the enterprise computer telephony forum, the com- puter-telephony industry has agreed on a single tele- com bus for use with pci and compact pci computers. h.100/h.110 facilitates interoperation of components, thus providing maximum flexibility to equipment manu- facturers, value-added resellers, system integrators, and others building computer-based telecommunica- tions applications. subrate switching is the ability to switch part(s) of one byte from one stream/time slot to another stream/time slot. the parts are the following: n nibbles (4 bits) representin g a 32 kbits/s subrate n dibits (2 bits) representin g a 16 kbits/s subrate n bits representin g an 8 kbits/s subrate h.100/h.110 data transfers are always bytes. if subrate switching is used, the t8100a constructs a byte con- sisting of the subrate samples. the constructed byte may contain any combination of nibbles, dibits, or bits. in addition, individual data bits can be placed within a byte along with dont care bits. 5-6099f figure 2. cti call center application database ethernet cti server user extensions asr fax t1/e1 isdn pci bus h.100/h.110 bus to pstn t1 e1 isdn
lucent technologies inc. reserves the right to make changes to the product(s) or information contained herein without notice. n o liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such product(s) or information. ambassador is a trademark of lucent technologies inc. copyright ? 1998 lucent technologies inc. all rights reserved printed in u.s.a. may 1998 pn98-141ntnb printed on recycled paper for additional information, contact your microelectronics group account manager or the following: internet: http://www.lucent.com/micro e-mail: docmaster@micro.lucent.com n. america: microelectronics group, lucent technologies inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18103 1-800-372-2447 , fax 610-712-4106 (in canada: 1-800-553-2448 , fax 610-712-4106) asia pacific: microelectronics group, lucent technologies singapore pte. ltd., 77 science park drive, #03-18 cintech iii, singap ore 118256 tel. (65) 778 8833 , fax (65) 777 7495 china: microelectronics group, lucent technologies (china) co., ltd., a-f2, 23/f, zao fong universe building, 1800 zhong shan xi road, shanghai 200233 p. r. china tel. (86) 21 6440 0468 , ext. 316 , fax (86) 21 6440 0652 japan: microelectronics group, lucent technologies japan ltd., 7-18, higashi-gotanda 2-chome, shinagawa-ku, tokyo 141, japan tel. (81) 3 5421 1600 , fax (81) 3 5421 1700 europe: data requests: microelectronics group dataline: tel. (44) 1189 324 299 , fax (44) 1189 328 148 technical inquiries: germany: (49) 89 95086 0 (munich), united kingdom: (44) 1344 865 900 (bracknell), france: (33) 1 48 83 68 00 (paris), sweden: (46) 8 600 7070 (stockholm), finland: (358) 9 4354 2800 (helsinki), italy: (39) 2 6608131 (milan), spain: (34) 1 807 1441 (madrid) product brief may 1998 h.100/h.110 interface and time-slot interchanger ambassador T8105 T8105 selection guide features t8100 t8100a t8102 T8105 subrate switching ??? local-to-local connections 1,024 1,024 1,024 local-to-h.100 connections 256 256 512 512 ct_netrefs 1 222
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